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Single Supply, High Speed, Rail-to-Rail Output, Triple Op Amp ADA4855-3
FEATURES
Voltage feedback architecture Rail-to-rail output swing: 0.1 V to 4.9 V High speed amplifiers 410 MHz, -3 dB bandwidth, G = 1 210 MHz, -3 dB bandwidth, G = 2 Slew rate: 870 V/s 53 MHz, 0.1 dB large signal flatness 5.3 ns settling time to 0.1% with 2 V step High input common-mode voltage range -VS - 0.2 V to +VS - 1 V Supply range: 3 V to 5.5 V Differential gain error: 0.01% Differential phase error: 0.01 Low power 7.8 mA/amplifier typical supply current Power-down feature Available in 16-lead LFCSP
CONNECTION DIAGRAM
OUT1 +IN1 -IN1
16
15 14
13
-VS
NC +IN2 NC PD
1 2 3 4
12 +VS
ADA4855-3
11 OUT2 10 -IN2 9 +VS
5
+IN3
6
-IN3
7
OUT3
8
-VS
NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD CONNECTED TO -VS.
Figure 1.
APPLICATIONS
Professional video Consumer video Imaging Instrumentation Base stations Active filters
GENERAL DESCRIPTION
The ADA4855-3 (triple) is a single-supply, rail-to-rail output operational amplifier. It provides excellent high speed performance with 410 MHz, -3 dB bandwidth and a slew rate of 870 V/s. It has a wide input common-mode voltage range that extends from 0.2 V below ground to 1 V below the positive rail.In addition, the output voltage swings within 100 mV of either supply rail, making this rail-to-rail operational amplifier easy to use on singlesupply voltages as low as 3.3 V. The ADA4855-3 offers a typical low power of 7.8 mA per amplifier and is capable of delivering up to 57 mA of load current. It also features a power-down function for power sensitive applications that reduces the supply current down to 1 mA. The ADA4855-3 is available in a 16-lead LFCSP and is designed to work over the extended industrial temperature range of -40C to +105C.
NORMALIZED CLOSED-LOOP GAIN (dB)
1 0 G=1 -1 G=2 -2 -3 -4 -5 -6 1 100 10 FREQUENCY (MHz) 1000 G=5
07685-001
Figure 2. Frequency Response
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved.
07685-004
ADA4855-3 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Connection Diagram ....................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 5 V Operation ............................................................................... 3 3.3 V Operation ............................................................................ 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 Maximum Power Dissipation ..................................................... 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 Test Circuits ..................................................................................... 13 Theory of Operation ...................................................................... 14 Applications Information .............................................................. 15 Gain Configurations .................................................................. 15 20 MHz Active Low-Pass Filter ................................................ 15 RGB Video Driver ...................................................................... 16 Driving Multiple Video Loads .................................................. 16 PD (Power-Down) Pin .............................................................. 16 Single-Supply Operation ........................................................... 17 Power Supply Bypassing ............................................................ 17 Layout .......................................................................................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18
REVISION HISTORY
11/08--Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADA4855-3 SPECIFICATIONS
5 V OPERATION
TA = 25C, VS = 5 V, G = 1, RL = 150 , unless otherwise noted. Table 1.
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Test Conditions VO = 0.1 V p-p VO = 2 V p-p VO = 0.1 V p-p, G = 2 VO = 2 V p-p, G = 2 VO = 2 V p-p VO = 2 V p-p, G = 2 VO = 2 V step VO = 2 V step (rise/fall) VO = 2 V step (rise/fall), G = 2 fC = 5 MHz, VO = 2 V p-p, RL = 1 k fC = 20 MHz, VO = 2 V p-p, RL = 1 k f = 5 MHz, G = 2 f = 100 kHz f = 100 kHz G=2 G=2 Min Typ 410 200 210 120 53 50 870 5.3/9.5 7.4/7 -84/-105 -60/-66 -90 6.8 2 0.01 0.01 1.3 5.5 -3.8 0.05 92 6.4 0.5 -VS - 0.2 VCM = -0.2 V to +4 V 94 0.1 to 4.9 57 78 1.2 0.3 -125 +VS - 1.25 3 7.8 1.1 96 5.5 +VS - 1 3 Max Unit MHz MHz MHz MHz MHz MHz V/s ns ns dBc dBc dBc nV/Hz pA/Hz % Degrees mV V/C A A dB M pF V dB V mA ns s A A V V mA mA dB
Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) Crosstalk, Output to Output Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current per Amplifier POWER-DOWN Turn-On Time Turn-Off Time Bias Current Turn-On Voltage POWER SUPPLY Operating Range Quiescent Current per Amplifier Supply Current When Powered Down Power Supply Rejection Ratio
VO = 0.5 V to 4.5 V
HD2 -60 dBc, RL = 10
On Off
VS = 4.5 V to 5.5 V
Rev. 0 | Page 3 of 20
ADA4855-3
3.3 V OPERATION
TA = 25C, VS = 3.3 V, G = 1, RL = 150 , unless otherwise noted. Table 2.
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Test Conditions VO = 0.1 V p-p VO = 1.4 V p-p VO = 0.1 V p-p, G = 2 VO = 2 V p-p, G = 2 VO = 1.4 V p-p, G = 2 VO = 2 V step, G = 2 VO = 2 V step (rise/fall), G = 2 fC = 5 MHz, VO = 2 V p-p, RL = 1 k fC = 20 MHz, VO = 2 V p-p, RL = 1 k f = 5 MHz, G = 2 f = 100 kHz f = 100 kHz G=2 G=2 Min Typ 430 210 210 125 55 870 7.4/7.1 -76/-76 -68/-75 -88 6.8 2 0.01 0.01 1.3 5.5 -3.8 0.05 92 6.4 0.5 -VS - 0.2 VCM = -0.2 V to +3.2 V 94 0.1 to 3.22 40 78 1.2 +VS - 1.25 3 7.5 0.95 94 5.5 +VS - 1 Max Unit MHz MHz MHz MHz MHz V/s ns dBc dBc dBc nV/Hz pA/Hz % Degrees mV V/C A A dB M pF V dB V mA ns s V V mA mA dB
Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) Crosstalk, Output to Output Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current per Amplifier POWER-DOWN Turn-On Time Turn-Off Time Turn-On Voltage POWER SUPPLY Operating Range Quiescent Current per Amplifier Supply Current When Powered Down Power Supply Rejection Ratio
VO = 0.5 V to 4.5 V
HD2 -60 dBc, RL = 10
VS = 2.97 V to 3.63 V
Rev. 0 | Page 4 of 20
ADA4855-3 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Internal Power Dissipation1 Common-Mode Input Voltage Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec)
1
MAXIMUM POWER DISSIPATION
Rating 6V See Figure 3 (-VS - 0.2 V) to (+VS - 1 V) VS Observe power curves -65C to +125C -40C to +105C 300C
The maximum power that can be safely dissipated by the ADA4855-3 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure. To ensure proper operation, it is necessary to observe the maximum power derating curves.
3.0
MAXIMUM POWER DISSIPATION (W)
Specification is for device in free air.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2.5
2.0
1.5
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, JA is specified for a device soldered in a circuit board for surface-mount packages. Table 4.
Package Type 16-Lead LFCSP JA 67 JC 17.5 Unit C/W
1.0
0.5
07685-103
0
10
20
30
40
50
60
70
80
-40
-30
-20
-10
90
AMBIENT TEMPERATURE (C)
Figure 3. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. 0 | Page 5 of 20
100
0
ADA4855-3 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16 +IN1 15 -IN1 14 OUT1 13 -VS
NC 1 +IN2 2 NC 3 PD 4
12 +VS
ADA4855-3
TOP VIEW (Not to Scale)
11 OUT2 10 -IN2 9 +VS
NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD CONNECTED TO -VS.
OUT3 7
+IN3 5
-IN3 6
-VS 8
Figure 4. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 (EPAD) Mnemonic NC +IN2 NC PD +IN3 -IN3 OUT3 -VS +VS -IN2 OUT2 +VS -VS OUT1 -IN1 +IN1 Exposed Pad (EPAD) Description No Connect. Noninverting Input 2. No Connect. Power Down. Noninverting Input 3. Inverting Input 3. Output 3. Negative Supply. Positive Supply. Inverting Input 2. Output 2. Positive Supply. Negative Supply. Output 1. Inverting Input 1. Noninverting Input 1. The exposed pad must be connected to -VS.
Rev. 0 | Page 6 of 20
07685-003
ADA4855-3 TYPICAL PERFORMANCE CHARACTERISTICS
T = 25C, VS = 5V, G = 1, RF = 1 k for G > 1, RL = 150 , small signal VOUT = 100 mV p-p, and large signal VOUT = 2 V p-p, unless otherwise noted.
1 0 G=1 -1 G=2 -2 -3 -4 -5 -6 1 10 100 FREQUENCY (MHz) 1000 G=5
NORMALIZED CLOSED-LOOP GAIN (dB)
NORMALIZED CLOSED-LOOP GAIN (dB)
1 0 G=1 -1 -2 -3 -4 -5 -6 1 100 10 FREQUENCY (MHz) 1000 G=5 G=2
07685-004
Figure 5. Small Signal Frequency Response vs. Gain
1 0 -1 -2 -3 -4 -5 VS = 3.3V
07685-005
Figure 8. Large Signal Frequency Response vs. Gain
1
G=1
NORMALIZED CLOSED-LOOP GAIN (dB)
NORMALIZED CLOSED-LOOP GAIN (dB)
0 -1 -2 -3 -4 -5 VS = 3.3V -6 1
G=2 VOUT = 2V p-p G=1 VOUT = 1.4V p-p
G=5
G=2
G=5 VOUT = 2V p-p
1
10 100 FREQUENCY (MHz)
1000
100 10 FREQUENCY (MHz)
1000
Figure 6. Small Signal Frequency Response vs. Gain
1 0
CLOSED-LOOP GAIN (dB)
1
Figure 9. Large Signal Frequency Response vs. Gain
RL = 1k
CF = 4.4pF
CF = 6.6pF
0
-1 RL = 150 -2 -3 -4 -5 -6 1 10 100 FREQUENCY (MHz) 1000
CLOSED-LOOP GAIN (dB)
-1 -2 -3 -4 -5 -6 1
CF = 2.2pF
07685-006
100 10 FREQUENCY (MHz)
1000
Figure 7. Small Signal Frequency Response vs. Load
Figure 10. Small Signal Frequency Response vs. Capacitive Load
Rev. 0 | Page 7 of 20
07685-009
07685-008
-6
07685-007
ADA4855-3
0.2 0.1
6.2 6.1
VS = 3.3V, VOUT = 1.4V p-p
CLOSED-LOOP GAIN (dB)
VS = 5V
CLOSED-LOOP GAIN (dB)
0 -0.1 VS = 5V, VOUT = 2V p-p -0.2 -0.3 -0.4 -0.5
6.0 VS = 3.3V 5.9 5.8 5.7 5.6 G=2 5.5 1 10 100 FREQUENCY (MHz)
07685-037
1
10 100 FREQUENCY (MHz)
1000
1000
Figure 11. 0.1 dB Flatness vs. Supply Voltage
1 0
Figure 14. 0.1 dB Flatness vs. Supply Voltage
100 0
TA = +85C TA = +105C TA = -40C TA = +25C
75 PHASE
-50
CLOSED-LOOP GAIN (dB)
-1 -2 -3 -4 -5 -6
GAIN 25 -150
0
-200
-25
07685-038
-250
07685-035
1
10 100 FREQUENCY (MHz)
1000
-50
10
100
1k
10k
100k
1M
10M
100M
1G
-300 10G
FREQUENCY (Hz)
Figure 12. Small Signal Frequency Response vs. Temperature
-50 -55 -60
DISTORTION (dBc)
Figure 15. Open-Loop Gain and Phase vs. Frequency
-50 -60 -70 VOUT = 1V p-p RL = 1k
VOUT = 1V p-p VS = 3.3V RL = 1k
-65 -70 -75 -80 -85 -90 0.1 HD2 HD3
DISTORTION (dBc)
-80 -90 -100 -110
HD2
07685-014
1 FREQUENCY (MHz)
10
40
-130 0.1
1 FREQUENCY (MHz)
10
40
Figure 13. Harmonic Distortion vs. Frequency
Figure 16. Harmonic Distortion vs. Frequency
Rev. 0 | Page 8 of 20
07685-011
-120
HD3
PHASE (Degrees)
50
-100
GAIN (dB)
07685-040
ADA4855-3
0
-40 -50 -60
-20
FORWARD ISOLATION (dB)
CROSSTALK (dB)
-40 OUT3 OUT1 -80 OUT2
07685-012
IN2, IN3, OUT1 -70 -80 -90 -100 IN1, IN2, OUT3
-60
IN1, IN3, OUT2
-100
-120
0.1
1
10 FREQUENCY (MHz)
100
1000
-120
1
10
100
1000
FREQUENCY (MHz)
Figure 17. Forward Isolation vs. Frequency
0 -10 -20 -30
PSRR (dB)
Figure 20. Crosstalk vs. Frequency
-30 -40 -50
-40 -50 -60 -70 -80
07685-013
CMRR (dB)
-60 -70 -80 -90 -100 0.01
-PSRR +PSRR
-90 -100 0.01 0.1 1 10 FREQUENCY (MHz) 100
0.1
1 10 FREQUENCY (MHz)
100
Figure 18. Power Supply Rejection Ratio (PSRR) vs. Frequency
100
Figure 21. Common-Mode Rejection Ratio (CMRR) vs. Frequency
100
CURRENT NOISE (pA/Hz)
VOLTAGE NOISE (nV/Hz)
VS = 5V VS = 3.3V
10
10
1 10 100 1k 10k 100k FREQUENCY (Hz) 1M
07685-020
1
10M
10
100
1k 10k FREQUENCY (Hz)
100k
1M
Figure 19. Input Current Noise vs. Frequency
Figure 22. Input Voltage Noise vs. Frequency
Rev. 0 | Page 9 of 20
07685-017
07685-016
07685-015
-110
ADA4855-3
0.08 0.06 0.04 0.02 0 -0.02 -0.04 VS = 3.3V VS = 5V
1.5 CL = 2.2pF CL = 4.4pF CL = 6.6pF
1.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
0.5
0
-0.5
-1.0
07685-018
-0.08 TIME (10ns/DIV)
-1.5 TIME (10ns/DIV)
Figure 23. Small Signal Transient Response vs. Supply Voltage
0.08 0.06 0.04 0.02 0 -0.02 -0.04
07685-019
Figure 26. Large Signal Transient Response vs. Capacitive Load
0.08 0.06
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
CL = 2.2pF CL = 4.4pF CL = 6.6pF
0.04 0.02 0 -0.02 -0.04
CL = 2.2pF CL = 4.4pF CL = 6.6pF
VS = 3.3V -0.08 TIME (10ns/DIV)
-0.08
TIME (10ns/DIV)
Figure 24. Small Signal Transient Response vs. Capacitive Load
1.5
Figure 27. Small Signal Transient Response vs. Capacitive Load
23.7
RL = 150 RL = 1k
1.0
QUIESCENT CURRENT (mA)
OUTPUT VOLTAGE (V)
23.2
0.5
0
22.7
-0.5
22.2
-1.0
07685-021
TIME (10ns/DIV)
SUPPLY VOLTAGE (V)
Figure 25. Large Signal Transient Response vs. Load Resistance
Figure 28. Quiescent Current vs. Supply Voltage
Rev. 0 | Page 10 of 20
07685-029
-1.5
21.7 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
07685-023
-0.06
-0.06
07685-022
-0.06
ADA4855-3
4 3 2 1 2 x VIN
2.5 2.0 1.5 2 x VIN
VOUT VOLTAGE (V)
1.0 0.5 0 -0.5 -1.0 -1.5
07685-025
VOUT
VOLTAGE (V)
0 -1 -2
G=2 -4 TIME (50ns/DIV)
-2.0 -2.5
TIME (50ns/DIV)
Figure 29. Output Overdrive Recovery
0.6
2.0
Figure 32. Output Overdrive Recovery
3 VPD VOUT
VOUT = 1V p-p VS = 3.3V
0.4
OUTPUT VOLTAGE (V)
0.2
OUTPUT VOLTAGE (V)
1.0 1 0.5 0 -0.5 -1.0 0
0
-0.2
-1
-0.4
07685-026
-2
07685-129 07685-027
-1.5 -2.0 -3
-0.6 TIME (10ns/DIV)
TIME (1s/DIV)
Figure 30. Large Signal Transient Response vs. Capacitive Load
0.5 0.4 0.3
SETTLING TIME (%)
0.5 0.4 0.3
Figure 33. Turn-On/Turn-Off Time
INPUT
SETTLING TIME (%)
0.2 0.1 0 -0.1 -0.2 -0.3
INPUT
0.2 0.1 0 -0.1 -0.2 -0.3 ERROR
ERROR
07685-024
-0.4 -0.5 TIME (2ns/DIV)
-0.4 -0.5
VS = 3.3V TIME (2ns/DIV)
Figure 31. Settling Time
Figure 34. Settling Time
Rev. 0 | Page 11 of 20
POWER-DOWN VOLTAGE (V)
CL = 2.2pF CL = 4.4pF CL = 6.6pF
1.5
2
07685-028
-3
G=2 VIN = 3.3V
ADA4855-3
0 100
-10
-20
-30
OUTPUT IMPEDANCE ()
OFFSET VOLTAGE (mV)
10
VS = 3.3V
1
-40 VS = 5V -50
07685-031
0.1
07685-036
-60
0
0.5
1.0
1.5 2.0 2.5 3.0 3.5 4.0 COMMON-MODE VOLTAGE (V)
4.5
5.0
0.01 0.1
1
10 100 FREQUENCY (MHz)
1000
Figure 35. Input Offset Voltage vs. Common-Mode Voltage
23.6 23.4 QUIESCENT CURRENT (mA) 23.2 23.0 22.8 22.6 22.4 22.2 22.0
07685-032
Figure 38. Output Impedance vs. Frequency
5.00
VS = 5V
4.95
SATURATION VOLTAGE (mV)
4.90 4.85 4.80 4.75 4.70
07685-039
VS = 3.3V
4.65 4.60 0.01
21.8 -40
-25
-10
5
20
35
50
65
80
95
110
125
0.1
TEMPERATURE (C)
1 LOAD CURRENT (mA)
10
100
Figure 36. Quiescent Current vs. Temperature
2.4 2.2
Figure 39. Output Saturation Voltage vs. Load Current
OFFSET VOLTAGE (mV)
2.0 1.8 1.6 1.4 1.2 1.0 -40
-20
0
20 40 60 TEMPERATURE (C)
80
100
Figure 37. Offset Drift vs. Temperature
07685-034
Rev. 0 | Page 12 of 20
ADA4855-3 TEST CIRCUITS
+VS
+VS 10F
+
10F + 1k
0.1F VIN 49.9 10F
+
0.1F VOUT RL
VIN
1k 1k 53.6
07685-041
0.1F
0.1F VOUT
1k 10F + 0.1F -VS
RL
-VS
Figure 40. Noninverting Load Configuration
+VS AC
Figure 43. Common-Mode Rejection
+VS 10F
49.9
0.1F VOUT RL 10F 49.9
07685-042
VOUT RL AC -VS
07685-045
+
0.1F -VS
Figure 41. Positive Power Supply Rejection
+VS 10F
Figure 44. Negative Power Supply Rejection
+VS 10F
RG
RF 0.1F 0.1F VOUT 49.9 10F CL RL
RG
RF 0.1F 0.1F VOUT 49.9 10F RL
VIN
VIN
+
07685-043
-VS
-VS
Figure 42. Typical Capacitive Load Configuration
Figure 45. Typical Noninverting Gain Configuration
Rev. 0 | Page 13 of 20
07685-046
0.1F
+
0.1F
07685-044
0.1F
+
+
+
ADA4855-3 THEORY OF OPERATION
The ADA4855 is a voltage feedback op amp that employs a new input stage that achieves a high slew rate while maintaining a wide common-mode input range. The input common-mode range of the ADA4855 extends from 200 mV below the negative rail to 1 V below the positive rail. This feature makes the ADA4855 ideal for single-supply applications. In addition, this new input stage does not sacrifice noise performance for slew rate. At 6.8 nV/Hz, the ADA4855 is one of the lowest noise rail-torail output video amplifiers in the market. Besides a novel input stage, the ADA4855 employs the Analog Devices, Inc., patented rail-to-rail output stage. This output stage makes efficient use of the power supplies, allowing the op amp to drive up to three video loads to within 350 mV of the positive power rail. In addition, this output stage provides the amplifier with very fast overdrive characteristics, which is an important property in video applications. The ADA4855 comes in a 16-lead LFCSP that has an exposed thermal pad for lower operating temperature. This pad is internally connected to the negative rail. To avoid printed circuit board (PCB) layout problems, the ADA4855 features a new pinout flow that is optimized for video applications. As shown in Figure 4, the noninverting input and output pins of each amplifier are adjacent to each other for ease of layout. The ADA4855 is fabricated in Analog Devices dielectrically isolated eXtra Fast Complementary Bipolar 3 (XFCB3) process, which results in the outstanding speed and dynamic range displayed by the amplifier.
+VS C1
+IN Gm1 -IN R
Gm2
OUT
-VS
Figure 46. High Level Design Schematic
Rev. 0 | Page 14 of 20
07685-147
C
ADA4855-3 APPLICATIONS INFORMATION
GAIN CONFIGURATIONS
The ADA4855-3 is a single-supply, high speed, voltage feedback amplifier. Table 6 provides a convenient reference for quickly determining the feedback and gain set resistor values and bandwidth for common gain configurations. Table 6. Recommended Values and Frequency Performance1
Gain 1 2 5
1
20 MHz ACTIVE LOW-PASS FILTER
The ADA4855-3 triple amplifier lends itself to higher order active filters. Figure 49 shows a 20 MHz, 6-pole, Sallen-Key low-pass filter.
R7 1k R8 261
RF 0 1 k 1 k
RG N/A 1 k 200
-3 dB SS BW (MHz) 200 120 45
Large Signal 0.1 dB Flatness (MHz) 53 50 6
- R1 232 R2 1.69k C1 15pF C2 6.6pF U1 OP AMP + OUT1
VIN
Conditions: VS = 5 V, TA = 25C, RL = 150 .
R9 1k - R3 309 R4 1.87k C3 15pF C4 4.3pF
R10 261 U2 OP AMP + OUT2
Figure 47 and Figure 48 show the typical noninverting and inverting configurations and recommended bypass capacitor values.
+VS 10F 0.1F VIN +
ADA4855-3
0.1F - 0.1F 10F RF RG -VS
VOUT
R11 1k - R5 261 R6 1.43k C5 33pF
07685-047
R12 261 U3 OP AMP + C6 3pF OUT3
VOUT
Figure 49. 20 MHz, 6-Pole Low-Pass Filter
Figure 47. Noninverting Gain Configuration
RF +VS 10F 0.1F VIN RG -
The filter has a gain of approximately 6 dB and flat frequency response out to 14 MHz. This type of filter is commonly used at the output of a video DAC as a reconstruction filter. The frequency response of the filter is shown in Figure 50.
10
OUT3
0
OUT2
-10
MAGNITUDE (dB)
OUT1
ADA4855-3
0.1F + 0.1F 10F -VS
VOUT
-20 -30 -40 -50
07685-048
-60
07685-050
Figure 48. Inverting Gain Configuration
-70
1
10 FREQUENCY (MHz)
100
200
Figure 50. 20 MHz, Low-Pass Filter Frequency Response
Rev. 0 | Page 15 of 20
07685-049
ADA4855-3
RGB VIDEO DRIVER
Figure 51 shows a typical RGB driver application using dual supplies. The gain of the amplifier is set at +2, where RF = RG = 1 k. The amplifier inputs are terminated with shunt 75 resistors, and the outputs have series 75 resistors for proper video matching. In Figure 51, the PD pin is not shown connected to any signal source for simplicity. If the power-down function is not used, it is recommended that the PD pin be tied to the positive supply or be left floating (not connected).
75 VIN (R) 1k 1k 75 -VS 0.1F 0.1F
1 12
6.5 6.0 5.5
MAGNITUDE (dB)
5.0 4.5 4.0 3.5 3.0 VOUT = 2V p-p G=2
RL = 150 RL = 75 RL = 50
VOUT (R)
2.5
1
10 FREQUENCY (MHz)
100
200
16
15
14
13
+VS
VIN (G) 75
2 3
ADA4855-3
11 10 9
75
1k 1k +VS 0.1F 0.1F 0.1F +
PD 4
5 6 7 8
VIN (B) 75
1k 1k
-VS 75
07685-051
VOUT (B)
Figure 51. RGB Video Driver
DRIVING MULTIPLE VIDEO LOADS
Each amplifier in the ADA4855-3 can drive up to three video loads simultaneously, as shown in Figure 52. When driving three video loads, the ADA4855-3 maintains its excellent performance for 0.1 dB flatness and 3 dB bandwidth. Figure 53 shows the large signal frequency response of the ADA4855-3 with three different load configurations: 150 , 75 and 50 .
RF 1k +VS RG 1k 10F 0.1F 75 75 CABLE VOUT1 75 75 75 CABLE 0.1F 0.1F 75 10F 75 75 CABLE 75 75
-
ADA4855-3
+
75 CABLE VIN -VS
Figure 52. Video Driver Schematic for Triple Video Loads
Rev. 0 | Page 16 of 20
07685-052
+
0.1F
10F
Figure 53. Large Signal Frequency Response vs. Loads
PD (POWER-DOWN) PIN
VOUT (G)
10F
The ADA4855-3 is equipped with a PD (power-down) pin for all three amplifiers. This allows the user to reduce the quiescent supply current when an amplifier is inactive. The power-down threshold levels are derived from the voltage applied to the +VS pin. When used in single-supply applications, this is especially useful with conventional logic levels. The amplifier is enabled when the voltage applied to the PD pin is greater than +VS - 1.25 V. In a single-supply application, the voltage threshold is typically +3.75 V, and in a 2.5 V dualsupply application, the voltage threshold is typically +1.25 V. The amplifier is also enabled when the PD pin is left floating (not connected). However, the amplifier is powered down when the voltage on the PD pin is lower than 2.5 V from +VS. If the PD pin is not used, it is best to connect it to the positive supply. Table 7. Power-Down Voltage Control
PD Pin Not Active Active 5V >3.75 V <2 V 2.5 V >1.25 V <0 V 3V >1.75 V <1 V
VOUT2
VOUT3
07685-153
ADA4855-3
SINGLE-SUPPLY OPERATION
The ADA4855-3 is designed for a single power supply. Figure 54 shows the schematic for a single 5 V supply video driver. The input signal is ac-coupled into the amplifier via C1. Resistor R2 and Resistor R4 establish the input midsupply reference for the amplifier. C5 prevents constant current from being drawn through the gain set resistor. C6 is the output coupling capacitor. For more information on ac-coupled single-supply operation of op amps, see Avoiding Op-Amp Instability Problems in SingleSupply Applications, Analog Dialogue, Volume 35, Number 2, March-May, 2001, at www.analog.com.
5V C2 1F C3 10F
POWER SUPPLY BYPASSING
Careful attention must be paid to bypassing the power supply pins of the ADA4855-3. High quality capacitors with low equivalent series resistance (ESR), such as multilayer ceramic capacitors (MLCCs), should be used to minimize supply voltage ripple and power dissipation. A large, usually tantalum, 2.2 F to 47 F capacitor located in close proximity to the ADA4855-3 is required to provide good decoupling for lower frequency signals. The actual value is determined by the circuit transient and frequency requirements. In addition, 0.1 F MLCC decoupling capacitors should be located as close to each of the power supply pins and across both supplies as is physically possible, no more than 1/8-inch away. The ground returns should terminate immediately into the ground plane. Locating the bypass capacitor return close to the load return minimizes ground loops and improves performance.
5V
R2 50k R3 1k
R4 50k
C4 0.01F
VIN R1 75 C1 22F U1
C6 220F R7 75 VOUT R8 75
LAYOUT
As is the case with all high speed applications, careful attention to printed circuit board (PCB) layout details prevents associated board parasitics from becoming problematic. The ADA4855-3 can operate at up to 410 MHz; therefore, proper RF design techniques must be employed. The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance return path. Removing the ground plane on all layers from the area near and under the input and output pins reduces stray capacitance. Signal lines connecting the feedback and gain resistors should be kept as short as possible to minimize the inductance and stray capacitance associated with these traces. Termination resistors and loads should be located as close as possible to their respective inputs and outputs. Input and output traces should be kept as far apart as possible to minimize coupling (crosstalk) through the board. Adherence to microstrip or stripline design techniques for long signal traces (greater than 1 inch) is recommended. For more information on high speed board layout, see A Practical Guide to High-Speed Printed-Circuit-Board Layout, Analog Dialogue, Volume 39, September 2005, at www.analog.com.
R5 1k C5 22F
R6 1k -VS
ADA4855-3
07685-155
Figure 54. AC-Coupled, Single-Supply Video Driver Schematic
Another way to configure the ADA4855-3 in single-supply operation is dc-coupled. The common-mode input voltage can go ~200 mV below ground, which makes it a true single-supply amplifier. However, in video applications, the black level is set at 0 V, which means that the output of the amplifier must go to ground level as well. The ADA4855-3 has a rail-to-rail output that can swing to within 100 mV from either rail. Figure 55 shows the schematic for adding 50 mV dc offset to the input signal so that the output is not clipped while still properly terminating the input with 75 .
C1 10F 5V R1 3.74k VIN R2 76.8 U1 R5 75 VOUT R6 75 5V C2 0.1F
R3 1k
R4 1k -VS
ADA4855-3
07685-156
Figure 55. DC-Coupled, Single-Supply Video Driver Schematic
Rev. 0 | Page 17 of 20
ADA4855-3 OUTLINE DIMENSIONS
4.00 BSC SQ 0.60 MAX 0.60 MAX 0.65 BSC 3.75 BSC SQ 0.75 0.60 0.50
(BOTTOM VIEW)
PIN 1 INDICATOR
13 12
16
PIN 1 INDICATOR
1
TOP VIEW
2.25 2.10 SQ 1.95
5 4
9
8
0.25 MIN 1.95 BSC
12 MAX 1.00 0.85 0.80
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM
SEATING PLANE
0.35 0.30 0.25
0.20 REF
COPLANARITY 0.08
FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.
072808-A
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 56.16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-16-4) Dimensions shown in millimeters
ORDERING GUIDE
Model ADA4855-3YCPZ-R2 1 ADA4855-3YCPZ-R71 ADA4855-3YCPZ-RL1
1
Temperature Range -40C to +105C -40C to +105C -40C to +105C
Package Description 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ
Package Option CP-16-4 CP-16-4 CP-16-4
Ordering Quantity 250 1,500 5,000
Z = RoHS Compliant Part.
Rev. 0 | Page 18 of 20
ADA4855-3 NOTES
Rev. 0 | Page 19 of 20
ADA4855-3 NOTES
(c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07685-0-11/08(0)
Rev. 0 | Page 20 of 20

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